Technology

Data Centers Part III: The Rebirth of U.S. Semi Manufacturing – The Drive to Thrive

By: Krish Sankar, Matthew D. Ramsay, Joshua Buchalter CFA, Eddy Orabi, Steven Chin

Jul. 10, 2024 - 2 minutes

A technician in a clean room suit looking closely at a semiconductor.

The TD Cowen Insight

Our supply model indicates that the U.S. potentially has enough capacity to meet domestic demand for leading-edge chips by the end of the decade, but higher operating costs and talent scarcity are some challenges. Semicaps are key beneficiaries from the cumulative USD 40 billion in Wafer Fab Equipment (WFE) required to reach that goal.

Our Thesis

The move to rebuild the semiconductor ecosystem in the U.S. comes amid the rising importance of leading-edge semis from both a strategic and economic standpoint. While there are some challenges, based on our proprietary U.S. wafer capacity model along with our forecast for U.S. domestic needs, we believe the U.S. should have enough capacity to meet its domestic demand for leading-edge semis by the end of the decade. However, capacity availability is only one factor of what is required to achieve actual adequacy in leading-edge chips. Other factors that we discuss in this report include wafer pricing, fabrication economics, talent availability, labor turnover and availability of packaging facilities. The intent here is not to arrive at a conclusion whether the U.S. endeavor will succeed in its efforts or not, but rather to help investors better understand what is required for the U.S. to reach a level of adequacy in leading-edge chips.

What Is Proprietary

We developed a proprietary supply-demand analysis and a fabrication construction framework. We then applied it to a leading semiconductor manufacturing company to better understand the economics between operating a fabrication in the U.S. versus Taiwan and identify opportunities to improve chip costs longer-term. Our wafer supply and demand model for U.S. leading-edge chip consumption offers additional granularity on when and how much the U.S. needs to spend to achieve supply adequacy.

What To Watch

Production ramp for U.S. fabrications later in 2024 and into 2025, and the equipment facilitation in the 2026-27 timeframe, can provide a gauge for U.S. progress on reaching wafer supply goals.
Approximately 75% of grants under the Creating Helpful Incentives to Produce Semiconductors (CHIPS) Act are already awarded, but these awards are non-binding. The amount and timely distribution of these funds are critical.
Potential CHIPS Act 2.0 program for fabrications beyond 2030 could be a catalyst for semicap stocks.
Announcements for new capacity and spending by outsourced semis assembly and test (OSATs) for back-end packaging and testing that complement front-end foundries reflects the level of interest from end customers in making chips in the U.S.

Subscribing clients can read the full report, The Next Datacenter Decade, Driven By Acceleration & GenAI - Ahead Of The Curve, on the TD One Portal

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Krish Sankar

Managing Director, TMT - Semiconductor Capital Equipment, IT Hardware Research Analyst, TD Cowen

Krish Sankar
Managing Director, TMT - Semiconductor Capital Equipment, IT Hardware Research Analyst, TD Cowen

Biography

Krish Sankar is a Managing Director and Senior Research Analyst covering the semiconductor capital equipment and IT hardware sectors. He joined TD Cowen’s Technology, Media & Telecom team in February 2018. Prior to joining TD Cowen, Mr. Sankar worked as a top-ranked analyst at Bank of America Merrill Lynch for almost 14 years, where he covered the semiconductor capital equipment, EDA software, and alternative energy sectors. Before joining Bank of America-Merrill Lynch, Mr. Sankar was a product manager at Applied Materials. Mr. Sankar is ranked among the top semiconductor capital equipment analysts in Institutional Investor polls.

Mr. Sankar holds a B.Tech (with Honors) in ceramic engineering from IIT (BHU), Varanasi, and an MS in materials science and engineering from the University of Minnesota.

Matthew D. Ramsay

Managing Director, TMT – Semiconductors Research Analyst, TD Cowen

Matthew D. Ramsay
Managing Director, TMT – Semiconductors Research Analyst, TD Cowen

Biography

Matthew D. Ramsay is a Managing Director and senior research analyst covering the semiconductor sector. Prior to joining TD Cowen, Mr. Ramsay worked as an analyst at Canaccord Genuity, where he also covered semiconductor stocks. He previously worked as a senior design engineer at AMD and held senior performance engineering roles at Sun Microsystems and Spansion.

Mr. Ramsay holds a BS in computer engineering from the University of Evansville, where he was a NCAA Division I Men’s Soccer athlete. He holds an MS in electrical engineering & computer architecture from the University of Wisconsin, and an MBA from Indiana University’s Kelley School of Business.

Joshua Buchalter, CFA

Director, TMT – Semiconductors Research Analyst, TD Cowen

Joshua Buchalter, CFA
Director, TMT – Semiconductors Research Analyst, TD Cowen

Biography

Joshua Buchalter is a director covering the semiconductor and mobility technology sectors. He has been working on the semiconductors team at TD Cowen since 2018.

Prior to joining TD Cowen, Mr. Buchalter covered the semiconductor sector as an equity research associate at Oppenheimer & Co and Needham & Co.

Mr. Buchalter received a BSc in economics from Tufts University, an MBA in finance and accounting from Boston College, and is a CFA® charterholder.